Amplifier Card

TM 11-6625-646-15

through the secondary winding of transformer T6. The

d. Output Signal Circuit.

The output of the

emitter-base bias differential of approximately 0.2 volt

modulator stage from pin 16 of receptacle J70 is

makes transistor Q1 conductive at all times. Capacitors

connected through a gain control network to a four-stage

C4 and C5 complete the signal input and signal output

amplifier card 14E3049-19. The gain control network,

coupling circuits, respectively, to the emitter of ac

consisting of capacitor C203 and resistors R206 and

amplifier Q1.

R207 (on card A03V3060), simulates the full-gain

configuration of the gain control network in the SAS

b. Second Ac Amplifier. The amplified signal from

amplifier. From pin 18 of receptacle J66, the controlled

the secondary winding of interstage transformer T7 is

output is applied to the input circuit of the four-stage

applied across the emitter and base of PNP transistor

amplifier card at pin 6 of receptacle J69. This amplifier

Q2; the amplified output signal is taken across the

card is identical with the amplifier card used in SAS

emitter and collector and coupled through interstage

amplifiers (para 1-28). The differential output of the

transformer T8 to the demodulator. Operating voltage

amplifier card at pins 13, 15, and 17 of receptacle J69 is

(27 volts dc) from the power supply of the test set is

applied across torquemotor simulator resistors R302 and

connected through pin 7 of the card connector to the

R303 (on card A02V3064). Connections to function

voltage dividing and biasing network consisting of

meter M1 are routed from pins 3 and 6 of receptacle J67

resistors R11, R12, and R14. Operating voltage is

through the DEM OUTPUT positions of FUNCTION

supplied to the emitter of transistor Q2 through dc

switch wafers S7A and S7B Resistor R304 (on card

degeneration resistor R14 and ac degeneration resistor

A02V3064) is a meter multiplier.

R13.

The voltage dividing network, consisting of

resistors R11 and R12, halves the supply voltage and

provides bias to the base of transistor Q2 through the

1-28. Amplifier Card

secondary winding of transformer T7. The emitter-base

(fig. 1-3)

differential of approximately 0.2 volt makes transistor

On the amplifier card, the test signal output of the

Q2 conductive at all times. Despite the higher operating

demodulator-modulator card under test is amplified,

voltage, the gain of the second ac amplifier stage is

converted to a differential dc current in a phase-

approximately the same as that of the first. Capacitors

sensitive demodulator, and coupled through emitter

C6 and C7 complete the signal input and signal output

followers to resistive loads which simulate the

coupling circuits to the emitter of ac amplifier Q2.

torquemotor windings of an extensible link. The output

of the emitter followers is also connected to function

c. Demodulator and Emitter-Followers.

In the

meter M1 to permit monitoring the amplitude and

demodulator,

400-cycle

reference

voltage

polarity of the differential current output.

(approximately 8 volt ac) from phase-shifting voltage-

a. First Ac Amplifier. The signal input path is

divider network C201, R312, R313 is applied to the

completed through a phase-correcting gain-control

center tap of the secondary winding of interstage

network consisting or resistor R18 and capacitor C10.

transformer T8.

The amplified output signal is taken across the emitter

(1) During a no-signal condition, only the

and collector and coupled through interstage

reference voltage is present in the secondary winding of

transformer T7 to the second ac amplifier. Operating

transformer T8. The positive half-cycle of this reference

voltage (approximately 23 volts dc) from pin 8 of the

voltage, taken from both ends of the winding, is rectified

card connector is connected to the voltage-dividing and

by diodes CR9 and CR10. The dc output of diode

biasing network consisting of resistors R7, R8, and R10.

rectifier CR9 is filtered by capacitor C8 and applied to

Operating voltage is applied to the emitter of transistor

load resistor R15 which is connected across the base

Q1 through dc degeneration resistor R10 and ac

and collector of transistor Q3. The dc output

degeneration resistor R9. The voltage-dividing network,

consisting of resistors R7 and R8, halves the supply

voltage and provides bias to the base of the transistor