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TM 9-4931-378-13&P
REPAIR INSTRUCTIONS
Section I. GENERAL INSTRUCTIONS
Static Pressure Signal
The test set is functionally
Differential Pressure Signal
divided into five sections; power, AADS test, LAI test, EPU
AADS Reference Signal
test, and TS monitor. Figure 6-1 is a block diagram of the
Fore-Aft TAS Signal
test set and figure FO-1 is the schematic diagram of the
Lateral TAS Signal
front panel/chassis wired assembly.
Fore-Aft IAS Signal
Power Section. The power section requires 115
a.
Lateral IAS Signal
Vat, 50, 60 or 400 Hz and +28 Vdc input power. The 115
LAI +15 Vdc
Vac is used by power supplies PS1 and PS2 to provide +5
LAI -15 Vdc
Vdc and 15 Vdc respectively. Power supply PS1 provides
ADS FAIL Discrete Signal
operating power to the test set circuits, test set decimal dis-
ADS NO GO Discrete Signal
play and panel lighting power to the LAI under test; PS2
Serial Data
provides operating power to the test set circuits, LAI and
Data Ready
AADS LRU's under test. The +28 Vdc source provides
e. TS Monitor Section. The TS monitor section pro-
operating power to the test set indicator lamps and to the
vides test set monitor functions of the 115 Vac and +28
EPU under test. Switches and test points are provided to
Vdc input power, the +5 Vdc, +10 Vdc, -10 Vdc voltages
monitor voltage and current supplied to the LRU's under
and the following test set outputs may be test point moni-
test.
tored:
The AADS test section
b. AADS
Test
Section.
SIN α
routes test set generated 15 Vdc and simulated AADS Ref-
Cos α
erence signal to the AADS under test. The AADS Test
SIN
Switch (S16) and the associated test points provide for
Cos
monitoring the four resolver outputs, the air temperature
sensor output, and the continuity/resistance of the anti-
icing heater,
Radar Altitude
The LAI test section routes
c.
LAI Test Section.
Reference Oscillator
15 Vdc operating power to the LAI under test, simulates
f. Display Driver Circuit Card Assembly 1A1. T h e
fore-aft IAS, lateral IAS, and ADS FAIL signals. The PNL
serial data applied to this circuit card assembly (CCA) is
LIGHTS switch (S19) provides +5 Vdc to test the panel
converted into an eight-bit parallel data word. This data
lights of the LAI under test.
word is applied to eight lamp drivers and three binary-to-
d. EPU Test Section, The EPU test section routes
seven segment decoder/drivers. The lamp drivers supply
+28 Vdc and the following simulated signals to the EPU
binary data bits B0 through B7 to drive front paneI indica-
tors DS8 through DS1 respectively. Meanwhile, the binary-
under test:
Four resolver AADS angle signals
to-seven decoders convert the eight-bit data word to three
sets of signals. These signals drive three digit display DS12
Air Temperature
on the test set front panel. Setting SELF TEST switch S5
Radar Altitude
on the front panel to SELF TEST enables the self test input
Radar Altimeter Reliability
to CCA 1A1. The data registers are loaded with logic 1`s,
LAI FAIL discrete
turning on twelve lamp drivers and all of the seven segment
CPU TEST discrete
decoder drivers.
Data Transmit Request
g. Clock and Comparator CCA 1A2. Clock circuits
Data Clock
on this CCA generate the data clock and data transmit
The EPU test section monitors the following test points or
request waveforms illustrated in figure 5-13. DATA WD SEL
outputs of the EPU under test to isolate EPU faults:
switch S8 on the front panel selects inputs for the comparator
EPU +5 Vdc
on this CGA. The comparator generates the proper number
EPU -5 Vdc
of clock pulses to load the selected word from the serial
EPU +12 Vdc
data into CCA 1A1. The clock pulses shut off when the
AADS +15 Vdc
selected word is loaded into CGA 1A1. Also, CCA 1A2 has
AADS -15 Vdc
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