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TM 55-4920-430-13
(4) Drive voltage for the demodulator is obtained by lagging the input reference voltage by 90.
The lag is developed in the network comprised of resistors R43, R44, and R45 and capacitors C13 and
C14. The output of the network is applied to the input of U14. The output of the zero crossing detector
U14 is a square wave which leads the reference by 90.
(5) Resistors R68 and R69 and capacitor C16 form a low-pass filter with a time constant of 60
milliseconds. The input to the filter is connected to pin 12. The output of the lag filter is connected to
pin 44.
(6) During self-test, pin 43 is connected to ground at pin 4 by self-test switch S16. This operates
ccda self-test relay K6. This connects CCDA self-test signal from pin 42 to the input of analog switch
U15. At the same time, it disconnects the CCDA servo amplifier signal at pin 41 from the input of U15.
c. Differential Airspeed Hold (DASH) Actuator Simulator Circuit. (See fig. 1-9. ) This circuit in-
cludes two transfer function circuits. No. 1 transfer, function (TF1) is an integrator which simulates
electrically the DASH actuator extending or retracting. No. 2 transfer function (TF2) is a first order
lag which simulates aircraft response to the dash actuator extending or retracting.
(1) Chassis mounted resistor R24, connected between pin 55 and pin 56, simulates the actuator
servo motor. For each direction of rotation, one side of resistor R24 is grounded and +28 volt dc is ap-
plied to the other side by relay K3.
(2) With the input signal at pin 54 simulating an extend signal, the gain of amplifier U7 is -0.36.
With the input signal at pin 57 simulating a retract signal, the gain of amplifier U7 is +0.36. For a +28
volt dc input signal, the output of amplifier U7 is 10-volt dc.
(3) The integration rate of U10 is fixed at -0.41 volt/volt seconds by resistor R21 and capacitor
C8. The output of U10 is limited to
12.5 volts dc by zero diodes VR2 and VR3. Resistor R24 and R25
form a 5.7:4.3 voltage divider. As a result, the simulated feedback output of TF1, at TP5 is -0.22 volt/
volt second, limited to   6.6-volts dc. Integrator drift rate is set to zero by resistor R19.
(4) The static gain of U5 is -1.33 volt/volt nominal, fixed by resistor R28 and R29. The lag,
developed in resistor R29 and capacitors C9 and C10, is 0.49 seconds. The quiescent output of U5 is set
to zero by resistor R31.
(5) The ratio of the voltage divider formed by resistor R32, R33, and R26 is 5.7:4.3. As a result
the output of transfer function TF2 at TF5 is approximately 6.6-volts dc.
(6) Transfer function TF1 is selected when +28-volt dc is applied to pin 13. This causes integra-
tor U10 to be gated, releasing relay K5B, and connecting the output of U10 to input of U8. Transfer
function TF2 is selected when +28-volt dc is applied to pin 14. The output at pin 59 is 0-volt dc. When
pins 13 and 14 are at 0-volts dc (ground) or open.
(7) During self-test, connecting pin 43 to ground at pin 4 by self-test switch S16, operates self-test
relay K3. This connects the dash self-test pulse signal from pin 52 to the input of U7. It also connects
pins 23 and 24 to pin 4. This operates self-test relay K3 and self-test polarity relay K4. These relays
connects the DASH self-test negative signal from pin 53 to the input of U7.
1-16. Dc Stimulus Circuit. (See fig. 1-10.) Dc stimulus circuit card A3 includes circuits for generat-
ing dc stimulus signals and actuator drive currents. The card also contains circuits for making con-
tinuity measurements. Two type of dc voltages are generated: Steady-state dc voltages are provided at
constant levels. Dc stimulus signals in step form are developed from dc relay switched outputs.
a. Steady-State Voltage Circuits.
(1) With -15-volt dc applied across resistor R61 to inverting input pin 2 of op-amp U2 the roll
detent signal output at pin 11 is +7-volt dc.

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