500 kHz Switch

TM 11-6625-467-34

is forward biased and the 500-kHz signal is at-

2-32. 500 kHz Switch

tenuated by inductor L3. The output waveform for

(fig. 2-27)

t h i s condition is shown in B, figure 2-27. The

w a v e f o r m is identical with that for the + gate

a. The 500-kHz switch receives two signal inputs:

ground except that the maximum voltage occurs

a 500-kHz sine wave from the 500-kHz oscillator

during the negative half cycle of the square wave.

and a 100-HZ square wave from the AN/ARC-54

Inductors L2, L6, and L7, and capacitors C17, C19

homer module. By connecting grounds to the gate

and C20 are low pass filters that have a high im-

i n p u t s , the switch circuit produces signals that

pedance to 500-kHz and a low impedance to 100 Hz.

simulate homer right and homer left signals. The

+27.5 volts dc connected to the junction of R38 and

Capacitors C13 and C15 are output coupling capaci-

tors that block the dc level from the output signal.

R32 reverse bias diode CR1. The voltage divider

Inductor L5 and capacitor C16 are resonant at 500-

consisting of R28 and R27 places approximately a 3-

kHz; this circuit smoothes the output and removes

volt reverse bias on diode CR2. The 27.5 volts dc

switching transients.

similarly bias diodes CR3 and CR4 through resistor

R31 and voltage divider R25 and R26. Capacitor C12

2-33. 500-kHz Discriminator

couples the 500-Hz input to the anodes of diodes CR1

(fig. 2-28)

and CR2, and to the cathodes of diodes CR3 and

The 500-kHz discriminator changes a frequency-

CR4. Without a 100-Hz square wave applied to the

modulated, 500-kHz carrier into an audio signal

circuit, the diodes are reverse biased and block the

corresponding to the original modulating signal.

500-kHz from the output circuit. the 100-Hz square

The original modulating signal causes a variation in

wave (amplitude of 8 volts peak to peak) enters the

circuit through R24 and L2. The positive half cycle

the instantaneous frequency of the carrier signal

either above or below the center, or resting fre-

of the 100-Hz square wave forward biases CR2 to

q u e n c y . The discriminator output voltage varies

allow the 500-kHz signal to pass through diode CR2,

linearly according to the instantaneous frequency of

inductor L3, and capacitor C15 to the output. In-

the input signal. The rate at which the input fre-

ductor L3, presents 700 ohms of inductive reactance

quency deviates from the center frequency deter-

t o the 500-kHz signal, and the output signal is

mines the output signal frequency; the amount that

attenuated approximately 3 db. The negative half

the input frequency deviates from the center fre-

cycle of the 100-HZ square wave forward biases

q u e n c y determines the amplitude of the output

d i o d e CR3 to allow the 500-kHz signal to pass

signal. Capacitor Cl couples the 500-kHz fm input

through diode CR3, inductor L4, and capacitor C13.

signal to the base of transistor Q5. The circuit of

Inductor L4 attenuates the 500-kHz output signal

transistor Q5 amplifies the signal and applies it to

approximately 3 db as explained for L3 above. The

the limiter circuit. The limiter circuit, consisting of

output waveforms for the various conditions of the

diodes CR4 and CR5, clips the 500-kHz output of Q5,

gate inputs are shown in B, figure 2-27.

and the input to the discriminator is kept at a con-

b. With ground applied to the + gate, ground is

stant level of approximately 0.6 volt. Capacitor C2

present at the cathode terminal of diode CR1. The

positive half cycle of the 100-Hz square wave for-

couples the 500-kHz signal at the collector of Q5 to

ward biases diode CR1 and causes the 500-kHz

the discriminator circuit.

a. At the center frequency of 500-kHz capacitors

signal to pass through diode CR1, capacitor C18, and

capacitor C15 to the output. With diode CR1 for-

C4 and C5 and inductor L1 form a parallel-resonant

ward biased, the 500-kHz signal bypasses inductor

circuit that offers high impedance to current flow

through the remaining portion of the discriminator;

L3 and arrives at the output with zero attenuation.

therefore, at the center frequency, the discrimi-

The negative half cycle of the 100-HZ square wave

nator output is zero. Variable inductor L1 tunes the

forward biases diode CR3 and causes the 500-kHz

parallel-resonant circuit to precisely 500-kHz.

signal to apear at the output attenuated 3 db as ex-

b. When the frequency swings below 500-kHz,

plained above. The resultant output signal is shown

the series lc circuit consisting of capacitors C4 and

in B, figure 2-27. The 500-kHz sine wave is modu-

C7 and inductor L1, approaches resonance and cur-

l a t e d approximately 30 percent by the 100-Hz

rent flow through this path increases.

square wave with the maximum amplitude portion

c. When the frequency swings above 500-kHz, the

o c c u r r i n g during the positive half cycle of the

series lc circuit, consisting of capacitors C5, C6, C9

square wave. With ground applied to the -- gate, the

and C10 and inductor L1, approaches resonance and

same action occurs on the negative half cycle of the

current flow increases through this path. (Capaci-

100-Hz square wave. Diode CR4 is forward biased

tors C9 and C10 are 500-kHz filter bypass capacitors

and causes the 500-kHz signal to bypass L4 via Cr4

that are essentially short circuits at the operating

and CR14. During the positive half cycle, diode CR2

2-68