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Page Title: GLOSSARY (cont)
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TM 11-6625-2937-13
gram for a particular printed circuit card.
Program counter
A 16-bit register which holds a memory address. This register holds the address
of the next instruction to be executed in the program.
PLL
Phase-locked loop. This circuit consists primarily of a phase detector, a loop f ilter
and a voltage-controlled oscillator (VCO). It synchronizes the VCO with the
phase of the reference signal.
R
RAM
Random access memory. Under program control information can be read from
or written into this memory device. It is often used as scratchpad memory, and
holds results and variable data.
Read signal
This signal allows data to be read from memory.
RES
Reset. This input signal is used to reset and start the MPU from a power-down
condition, resulting from a power failure or an initial start-up of the MPU.
When this line is low the information in the registers is lost.
R/W
Read/Write. This output signal informs peripherals and memory devices when
the MPU is in a read (high) or write (low) state. The normal standby state of
this signal is read (high). When the MPU is halted, it is in the logical one state
ROM
Read only memory. The program of instructions for the microprocessor is nor-
mally held in a ROM. Information is normally fixed in the ROM and can only
be read.
S
Scratchpad memory
Any RAM used as a temporary, fast-access store for interim results and variable
data.
Stack
A section of RAM is allocated as the stack. The stack is a last-in, first-out memo-
ry (LIFO) in which successive bytes can be stacked one after the other.
Stack pointer
A 16-bit register which holds a memory address. This register holds the address
of the next vacant location in the stack.
STE
Special test equipment. STE refers to the control-interface unit and identifies
several of its circuit card assemblies.
STE module test
Power is applied to the module test connector for control-interface unit
microprocessor or standard logic card test.
T
Test number display
Provides three-digit display of particular program card test being run. Also pro-
vides fault location information when control-interface unit BITE test is being
run.
Test set case
Case, Test Set CY-7767/UKM-4. The test set case is 31 inches high, 28 inches
wide and 24 inches in depth.
Test set group
Test Set, Electronic Systems AN/UKM-5.
U
Unit test power connector
Provides interface, between encoder or decoder and control interface unit.
V
VCO
Voltage-controlled oscillator. The dc voltage applied to the VCO produces an out-
put signal whose frequency is determined by the voltage input from the loop
filter. It is synchronized with the phase of the reference signal.
VMA (VUA)
Valid memory address. This signal indicates to peripheral devices that there is a
valid address on the address bus. Valid user address (VUA) has the same meaning.
W
Word
A set of binary digits which are operated on collectively and which form one num-
ber. A word may represent a binary number (data word) or an instruction.
Write signal
This allows data to be written into memory.
G-3

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