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TM 55-4920-412-13&P
l.
Inter Cal Select Circuit.
(1)
Set ON-OFF-SIM ONLY to OFF.
(2)
Connect simulator INTERCONNECT jack
to unit tester J5 INTERCONNECT jack using cable 217-
419742-000.
(3)
Connect digital multimeter to unit tester
connector J8 pin 17 (HI) and COM test point, using leads
and adapter and set controls as follows:
(a)
Set INTER CAL SELECT switch to 1.
(b)
Set ON-OFF-SIM ONLY switch to ON. Digital
multimeter will indicate between +4 and +6 vdc. If not
see Troubleshooting Table 4-29 (Inter Cal Select).
(c)
Set ON-OFF-SIM ONLY switch to OFF.
(4)
Repeat technique of (3) above for INTER
CAL SELECT switch positions and pin connections listed
in Table 4-30. Digital multimeter will indicate within limits
specified. Refer to Figure 4-20 for pin locations on J2,
J3 and J9. If not, see Troubleshooting Table 4-29 (Inter
Cal Select).
(5)
Disconnect digital multimeter and set ON-
OFF-SIM ONLY to OFF.
m.
Warn Outputs, Failures Proc, Test Freq, Clock
Inhibit and PIS Control Circuits.
(1)
Set ON-OFF-SIM ONLY to OFF.
NOTE
Troubleshooting Table 4-29 or Fig.
FO-6 used for the above circuits.
(1)
Set ON-OFF-SIM ONLY to OFF.
(2)
Connect digital multimeter leads to J8 pin
24 and COM on unit tester.
(3)
Set CLOCK INHIBIT to ANA.
(4)
Set LOGIC P/S switch to 1.
(5)
Set ON-OFF-SIM ONLY switch to ON.
Digital multimeter will indicate between +4.0 and +6 0
vdc. If not, see Troubleshooting Table 4-29.
(6)
Set ON-OFF-SIM ONLY to OFF.
(7)
Disconnect from J8 pin 24 on Unit Tester.
(8)
Repeat technique (1) thru (7) above using
switches and pin connections as listed in Table 4-31.
Digital multimeter will indicate within the limits specified.
If not, see troubleshooting table 4-29.
Table 4-29. Troubleshooting Warn Outputs, Failures-Test Freq-Proc, Clock Inhibit and P.S Control and Inter Cal Select
circuits.
Trouble
Probable Cause
Remedy
Warn Output circuit defective
Warn Output Switch (S3).
Replace defective components,
FO-6.
Failures Test Freq circuit defective
B C D Counter Board (AS). Test fre-
Replace defective components,
quency switch (SI).
Figures 4-18, FO-6, FO-11. Replace
board (A5) if required.
Failures-Proc defective
Failure Proc (S2).
Replace defective component, FO-6.
Clock Inhibit DIG-ANA circuit
Pot R2, clock inhibited (SS5).
Replace defective components,
defective
Regulator board (A4).
Figures 4-14, FO-6, FO-8. Replace
board (A4) if required.
P/S Control does not vary voltage
Pot R1
Replace defective component, FO-6.
Inter Cal Select switch circuit
Regulator board (A4). OSC Control
Replace defective components,
Board (A6). Inter Cal Select switch
FO-6, FO-8, FO-10 and
(S6).
Figures 4-14, 4-16. Replace (A4)
or (A6) if required.
Change 2 4-55
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